Description
The Bus Blaster V3c for MIPS is an affordable high-speed debug adapter designed to support JTAG debug on a variety of MIPS processors. This version of the Bus Blaster has a 14-pin target connector and interface cable with buffered logic for MIPS EJTAG. In other respects it is identical to the standard Bus Blaster V3c
Features:
For MIPS (EJTAG) with 14-pin connector
Adapter for 14-pin to 12-pin and 6-pin connectors for use with Digilent Nexys 4 DDR and Wi-Fire boards
Includes Bus Blaster acrylic case panel and nylon screws (requires assembly)
High-speed USB 2.0 based on FT2232H chip
Buffered interface for 3.3V to 1.8V
Reprogrammable buffers compatible with multiple debugger types
Compatible with 'jtagkey', 'KT-link' programmer settings in OpenOCD, urJTAG, etc.
Pre-programmed JTAGkey compatible buffer image ships
Mini-CPLD Development Board: Self-Programming, Additional CPLD Pins to Header
Open Source (CC-BY-SA)
Specification
Oorsprong : Cn (Oorsprong)
Accessoires : Extension Board
